| Message ID | SN6PR06MB5342C82F372F37FB8E21B327A57A9@SN6PR06MB5342.namprd06.prod.outlook.com |
|---|---|
| State | Superseded |
| Delegated to: | Ambarus Tudor |
| Headers | show |
| Series | mtd: spi-nor: XTX: Add support for XTX XT25F128B | expand |
Hi, On 4/2/21 11:15 PM, Chris Morgan wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Add support for a new vendor (XTX) along with a new chip from the > vendor (XT25F128B). This chip is used in the Odroid Go Advance, > and has been tested extensively using the spi-gpio driver, as it > is connected to a serial flash controller that is not currently > supported (but the pins can be repurposed to GPIO). Read, write, and > erase all work as expected. > > Datasheet can be found here: > https://datasheet.lcsc.com/szlcsc/2005251034_XTX-XT25F128BSSIGT_C558844.pdf > > Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Chris, we're trying to figure out how to deal with the continuation codes. Discussions on going at: https://lkml.org/lkml/2021/2/7/223 https://www.spinics.net/lists/kernel/msg3808260.html > --- > drivers/mtd/spi-nor/Makefile | 1 + > drivers/mtd/spi-nor/core.c | 1 + > drivers/mtd/spi-nor/core.h | 1 + > drivers/mtd/spi-nor/xtx.c | 24 ++++++++++++++++++++++++ > 4 files changed, 27 insertions(+) > create mode 100644 drivers/mtd/spi-nor/xtx.c > > diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile > index 653923896205..3f7a52d7fa0b 100644 > --- a/drivers/mtd/spi-nor/Makefile > +++ b/drivers/mtd/spi-nor/Makefile > @@ -17,6 +17,7 @@ spi-nor-objs += sst.o > spi-nor-objs += winbond.o > spi-nor-objs += xilinx.o > spi-nor-objs += xmc.o > +spi-nor-objs += xtx.o > obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o > > obj-$(CONFIG_MTD_SPI_NOR) += controllers/ > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c > index 0522304f52fa..9a89ec473e4b 100644 > --- a/drivers/mtd/spi-nor/core.c > +++ b/drivers/mtd/spi-nor/core.c > @@ -2215,6 +2215,7 @@ static const struct spi_nor_manufacturer *manufacturers[] = { > &spi_nor_winbond, > &spi_nor_xilinx, > &spi_nor_xmc, > + &spi_nor_xtx, > }; > > static const struct flash_info * > diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h > index 4a3f7f150b5d..ee0e45eaffcd 100644 > --- a/drivers/mtd/spi-nor/core.h > +++ b/drivers/mtd/spi-nor/core.h > @@ -425,6 +425,7 @@ extern const struct spi_nor_manufacturer spi_nor_sst; > extern const struct spi_nor_manufacturer spi_nor_winbond; > extern const struct spi_nor_manufacturer spi_nor_xilinx; > extern const struct spi_nor_manufacturer spi_nor_xmc; > +extern const struct spi_nor_manufacturer spi_nor_xtx; > > void spi_nor_spimem_setup_op(const struct spi_nor *nor, > struct spi_mem_op *op, > diff --git a/drivers/mtd/spi-nor/xtx.c b/drivers/mtd/spi-nor/xtx.c > new file mode 100644 > index 000000000000..4eec737e94c7 > --- /dev/null > +++ b/drivers/mtd/spi-nor/xtx.c > @@ -0,0 +1,24 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2021, Chris Morgan <macromorgan@hotmail.com> > + * Based on XMC SPI NOR module > + * Copyright (C) 2005, Intec Automation Inc. > + * Copyright (C) 2014, Freescale Semiconductor, Inc. > + */ > + > +#include <linux/mtd/spi-nor.h> > + > +#include "core.h" > + > +static const struct flash_info xtx_parts[] = { > + /* XTX (XTX Technology Limited) */ > + { "XT25F128B", INFO(0x0b4018, 0, 64 * 1024, 256, > + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | > + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, > +}; > + > +const struct spi_nor_manufacturer spi_nor_xtx = { > + .name = "xtx", > + .parts = xtx_parts, > + .nparts = ARRAY_SIZE(xtx_parts), > +}; > -- > 2.25.1 >
On Mon, Apr 05, 2021 at 08:52:11AM +0000, Tudor.Ambarus@microchip.com wrote: > Hi, > > On 4/2/21 11:15 PM, Chris Morgan wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > > > Add support for a new vendor (XTX) along with a new chip from the > > vendor (XT25F128B). This chip is used in the Odroid Go Advance, > > and has been tested extensively using the spi-gpio driver, as it > > is connected to a serial flash controller that is not currently > > supported (but the pins can be repurposed to GPIO). Read, write, and > > erase all work as expected. > > > > Datasheet can be found here: > > https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdatasheet.lcsc.com%2Fszlcsc%2F2005251034_XTX-XT25F128BSSIGT_C558844.pdf&data=04%7C01%7C%7Cf7133c0ccefc4898050e08d8f8101c7d%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C637532095378348815%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=SgseEt9ZbY%2BIaZdMyKLTAh3rnD5zrVqJYV3d0jAt6qM%3D&reserved=0 > > > > Signed-off-by: Chris Morgan <macromorgan@hotmail.com> > > Chris, we're trying to figure out how to deal with the continuation codes. > Discussions on going at: > https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2021%2F2%2F7%2F223&data=04%7C01%7C%7Cf7133c0ccefc4898050e08d8f8101c7d%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C637532095378353805%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=UJW6JeEVwwzttJ7CfhAOqGAzV%2FPyBJf%2FjWYvw6%2BUwuk%3D&reserved=0 > https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.spinics.net%2Flists%2Fkernel%2Fmsg3808260.html&data=04%7C01%7C%7Cf7133c0ccefc4898050e08d8f8101c7d%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C637532095378353805%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=wyMehux468x49Nb%2FhypiKif9rztptk9CJuRWmBzZ0Og%3D&reserved=0 Thanks, this helps. For what it's worth, I ran the same command (spincl) on my Raspberry pi against this chip and came up with the following: spincl -ib -m0 -c0 -s0 -p0 6 0x90 0x00 0x00 0x00 0x00 0x0b 0x17 spincl -ib -m0 -c0 -s0 -p0 4 0x9F 0x00 0x0b 0x40 0x18 Doesn't look like this one uses continuation codes either, sadly. Let me know what information I can provide to help with the continuation codes for these seemingly non-conformant chips. > > > --- > > drivers/mtd/spi-nor/Makefile | 1 + > > drivers/mtd/spi-nor/core.c | 1 + > > drivers/mtd/spi-nor/core.h | 1 + > > drivers/mtd/spi-nor/xtx.c | 24 ++++++++++++++++++++++++ > > 4 files changed, 27 insertions(+) > > create mode 100644 drivers/mtd/spi-nor/xtx.c > > > > diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile > > index 653923896205..3f7a52d7fa0b 100644 > > --- a/drivers/mtd/spi-nor/Makefile > > +++ b/drivers/mtd/spi-nor/Makefile > > @@ -17,6 +17,7 @@ spi-nor-objs += sst.o > > spi-nor-objs += winbond.o > > spi-nor-objs += xilinx.o > > spi-nor-objs += xmc.o > > +spi-nor-objs += xtx.o > > obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o > > > > obj-$(CONFIG_MTD_SPI_NOR) += controllers/ > > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c > > index 0522304f52fa..9a89ec473e4b 100644 > > --- a/drivers/mtd/spi-nor/core.c > > +++ b/drivers/mtd/spi-nor/core.c > > @@ -2215,6 +2215,7 @@ static const struct spi_nor_manufacturer *manufacturers[] = { > > &spi_nor_winbond, > > &spi_nor_xilinx, > > &spi_nor_xmc, > > + &spi_nor_xtx, > > }; > > > > static const struct flash_info * > > diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h > > index 4a3f7f150b5d..ee0e45eaffcd 100644 > > --- a/drivers/mtd/spi-nor/core.h > > +++ b/drivers/mtd/spi-nor/core.h > > @@ -425,6 +425,7 @@ extern const struct spi_nor_manufacturer spi_nor_sst; > > extern const struct spi_nor_manufacturer spi_nor_winbond; > > extern const struct spi_nor_manufacturer spi_nor_xilinx; > > extern const struct spi_nor_manufacturer spi_nor_xmc; > > +extern const struct spi_nor_manufacturer spi_nor_xtx; > > > > void spi_nor_spimem_setup_op(const struct spi_nor *nor, > > struct spi_mem_op *op, > > diff --git a/drivers/mtd/spi-nor/xtx.c b/drivers/mtd/spi-nor/xtx.c > > new file mode 100644 > > index 000000000000..4eec737e94c7 > > --- /dev/null > > +++ b/drivers/mtd/spi-nor/xtx.c > > @@ -0,0 +1,24 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Copyright (C) 2021, Chris Morgan <macromorgan@hotmail.com> > > + * Based on XMC SPI NOR module > > + * Copyright (C) 2005, Intec Automation Inc. > > + * Copyright (C) 2014, Freescale Semiconductor, Inc. > > + */ > > + > > +#include <linux/mtd/spi-nor.h> > > + > > +#include "core.h" > > + > > +static const struct flash_info xtx_parts[] = { > > + /* XTX (XTX Technology Limited) */ > > + { "XT25F128B", INFO(0x0b4018, 0, 64 * 1024, 256, > > + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | > > + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, > > +}; > > + > > +const struct spi_nor_manufacturer spi_nor_xtx = { > > + .name = "xtx", > > + .parts = xtx_parts, > > + .nparts = ARRAY_SIZE(xtx_parts), > > +}; > > -- > > 2.25.1 > > >
Hi, Chris, On 4/5/21 10:16 PM, Chris Morgan wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On Mon, Apr 05, 2021 at 08:52:11AM +0000, Tudor.Ambarus@microchip.com wrote: >> Hi, >> >> On 4/2/21 11:15 PM, Chris Morgan wrote: >>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >>> >>> Add support for a new vendor (XTX) along with a new chip from the >>> vendor (XT25F128B). This chip is used in the Odroid Go Advance, >>> and has been tested extensively using the spi-gpio driver, as it >>> is connected to a serial flash controller that is not currently >>> supported (but the pins can be repurposed to GPIO). Read, write, and >>> erase all work as expected. >>> >>> Datasheet can be found here: >>> https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdatasheet.lcsc.com%2Fszlcsc%2F2005251034_XTX-XT25F128BSSIGT_C558844.pdf&data=04%7C01%7C%7Cf7133c0ccefc4898050e08d8f8101c7d%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C637532095378348815%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=SgseEt9ZbY%2BIaZdMyKLTAh3rnD5zrVqJYV3d0jAt6qM%3D&reserved=0 >>> >>> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> >> >> Chris, we're trying to figure out how to deal with the continuation codes. >> Discussions on going at: >> https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flkml.org%2Flkml%2F2021%2F2%2F7%2F223&data=04%7C01%7C%7Cf7133c0ccefc4898050e08d8f8101c7d%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C637532095378353805%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=UJW6JeEVwwzttJ7CfhAOqGAzV%2FPyBJf%2FjWYvw6%2BUwuk%3D&reserved=0 >> https://na01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.spinics.net%2Flists%2Fkernel%2Fmsg3808260.html&data=04%7C01%7C%7Cf7133c0ccefc4898050e08d8f8101c7d%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C637532095378353805%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=wyMehux468x49Nb%2FhypiKif9rztptk9CJuRWmBzZ0Og%3D&reserved=0 > > Thanks, this helps. For what it's worth, I ran the same command (spincl) on > my Raspberry pi against this chip and came up with the following: > > spincl -ib -m0 -c0 -s0 -p0 6 0x90 > 0x00 0x00 0x00 0x00 0x0b 0x17 > > spincl -ib -m0 -c0 -s0 -p0 4 0x9F > 0x00 0x0b 0x40 0x18 I haven't checked what this spincl tool is doing. Would you please instead hack the spi-nor core and read 15 bytes let's say, and just dump them with a dev_err? > > Doesn't look like this one uses continuation codes either, sadly. > Let me know what information I can provide to help with the > continuation codes for these seemingly non-conformant chips. Does this flash has a vendor table? We can get the bank number from the vendor's table, Parameter ID field. Michael has recently added support to dump the SFDP tables via sysfs. Would you please dump the SFDP tables and post it here? Cheers, ta
Hi Chris, guys Am 02.04.21 um 22:15 schrieb Chris Morgan: > Add support for a new vendor (XTX) along with a new chip from the > vendor (XT25F128B). This chip is used in the Odroid Go Advance, > and has been tested extensively using the spi-gpio driver, as it > is connected to a serial flash controller that is not currently > supported (but the pins can be repurposed to GPIO). Read, write, and > erase all work as expected. Once you've figured out how vendor id stuff is read out correctly, would you mind also adding the the XT25F32B variant? From what I've checked it has all things in common with XT25F128B - just has a 64 instead of 256 sectors. Datasheet can be found at: https://datasheet.lcsc.com/szlcsc/2005251035_XTX-XT25F32BSOIGU-S_C558851.pdf > > Datasheet can be found here: > https://datasheet.lcsc.com/szlcsc/2005251034_XTX-XT25F128BSSIGT_C558844.pdf > > Signed-off-by: Chris Morgan <macromorgan@hotmail.com> > --- > drivers/mtd/spi-nor/Makefile | 1 + > drivers/mtd/spi-nor/core.c | 1 + > drivers/mtd/spi-nor/core.h | 1 + > drivers/mtd/spi-nor/xtx.c | 24 ++++++++++++++++++++++++ > 4 files changed, 27 insertions(+) > create mode 100644 drivers/mtd/spi-nor/xtx.c > > diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile > index 653923896205..3f7a52d7fa0b 100644 > --- a/drivers/mtd/spi-nor/Makefile > +++ b/drivers/mtd/spi-nor/Makefile > @@ -17,6 +17,7 @@ spi-nor-objs += sst.o > spi-nor-objs += winbond.o > spi-nor-objs += xilinx.o > spi-nor-objs += xmc.o > +spi-nor-objs += xtx.o > obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o > > obj-$(CONFIG_MTD_SPI_NOR) += controllers/ > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c > index 0522304f52fa..9a89ec473e4b 100644 > --- a/drivers/mtd/spi-nor/core.c > +++ b/drivers/mtd/spi-nor/core.c > @@ -2215,6 +2215,7 @@ static const struct spi_nor_manufacturer *manufacturers[] = { > &spi_nor_winbond, > &spi_nor_xilinx, > &spi_nor_xmc, > + &spi_nor_xtx, > }; > > static const struct flash_info * > diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h > index 4a3f7f150b5d..ee0e45eaffcd 100644 > --- a/drivers/mtd/spi-nor/core.h > +++ b/drivers/mtd/spi-nor/core.h > @@ -425,6 +425,7 @@ extern const struct spi_nor_manufacturer spi_nor_sst; > extern const struct spi_nor_manufacturer spi_nor_winbond; > extern const struct spi_nor_manufacturer spi_nor_xilinx; > extern const struct spi_nor_manufacturer spi_nor_xmc; > +extern const struct spi_nor_manufacturer spi_nor_xtx; > > void spi_nor_spimem_setup_op(const struct spi_nor *nor, > struct spi_mem_op *op, > diff --git a/drivers/mtd/spi-nor/xtx.c b/drivers/mtd/spi-nor/xtx.c > new file mode 100644 > index 000000000000..4eec737e94c7 > --- /dev/null > +++ b/drivers/mtd/spi-nor/xtx.c > @@ -0,0 +1,24 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2021, Chris Morgan <macromorgan@hotmail.com> > + * Based on XMC SPI NOR module > + * Copyright (C) 2005, Intec Automation Inc. > + * Copyright (C) 2014, Freescale Semiconductor, Inc. > + */ > + > +#include <linux/mtd/spi-nor.h> > + > +#include "core.h" > + > +static const struct flash_info xtx_parts[] = { > + /* XTX (XTX Technology Limited) */ > + { "XT25F128B", INFO(0x0b4018, 0, 64 * 1024, 256, > + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | > + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, > +}; > + > +const struct spi_nor_manufacturer spi_nor_xtx = { > + .name = "xtx", > + .parts = xtx_parts, > + .nparts = ARRAY_SIZE(xtx_parts), > +}; >
On 7/2/21 3:49 PM, Alex Bee wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > Hi Chris, guys Hi, > > > Am 02.04.21 um 22:15 schrieb Chris Morgan: >> Add support for a new vendor (XTX) along with a new chip from the >> vendor (XT25F128B). This chip is used in the Odroid Go Advance, >> and has been tested extensively using the spi-gpio driver, as it >> is connected to a serial flash controller that is not currently >> supported (but the pins can be repurposed to GPIO). Read, write, and >> erase all work as expected. > Once you've figured out how vendor id stuff is read out correctly, would > you mind also adding the the XT25F32B variant? I've started working on this, here's the work in progress: https://github.com/ambarus/linux-0day/commits/spi-nor/next-id-collisions > From what I've checked it has all things in common with XT25F128B - > just has a 64 instead of 256 sectors. > > Datasheet can be found at: > https://datasheet.lcsc.com/szlcsc/2005251035_XTX-XT25F32BSOIGU-S_C558851.pdf > >> >> Datasheet can be found here: >> https://datasheet.lcsc.com/szlcsc/2005251034_XTX-XT25F128BSSIGT_C558844.pdf >> we'll add just flashes that we can test. Do you have the flash at hand? Cheers, ta
Am 02.07.21 um 15:21 schrieb Tudor.Ambarus@microchip.com: > On 7/2/21 3:49 PM, Alex Bee wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> Hi Chris, guys > > Hi, > >> >> >> Am 02.04.21 um 22:15 schrieb Chris Morgan: >>> Add support for a new vendor (XTX) along with a new chip from the >>> vendor (XT25F128B). This chip is used in the Odroid Go Advance, >>> and has been tested extensively using the spi-gpio driver, as it >>> is connected to a serial flash controller that is not currently >>> supported (but the pins can be repurposed to GPIO). Read, write, and >>> erase all work as expected. >> Once you've figured out how vendor id stuff is read out correctly, would >> you mind also adding the the XT25F32B variant? > > I've started working on this, here's the work in progress: > https://github.com/ambarus/linux-0day/commits/spi-nor/next-id-collisions > >> From what I've checked it has all things in common with XT25F128B - >> just has a 64 instead of 256 sectors. >> >> Datasheet can be found at: >> https://datasheet.lcsc.com/szlcsc/2005251035_XTX-XT25F32BSOIGU-S_C558851.pdf >> >>> >>> Datasheet can be found here: >>> https://datasheet.lcsc.com/szlcsc/2005251034_XTX-XT25F128BSSIGT_C558844.pdf >>> > > we'll add just flashes that we can test. Do you have the flash at hand? I do, yes. I'm currently adding devicetree support for the upcoming Rock Pi 4 plus revisions, which will have these flashes onboard. After adding support for this variant ontop these patches (the wrong(?) flashid is 0x0b4016, btw.) everything is working as expected. Since it has been requested - the sfpd table and other sysfs entries look like that: ~ # hexdump /sys/devices/platform/ff1d0000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 0000000 4653 5044 0100 ff01 0000 0901 0030 ff00 0000010 000b 0301 0060 ff00 ffff ffff ffff ffff 0000020 ffff ffff ffff ffff ffff ffff ffff ffff 0000030 20e5 fff1 ffff 01ff eb44 6b08 3b08 bb42 0000040 ffee ffff ffff ff00 ffff ff00 200c 520f 0000050 d810 ff00 ffff ffff ffff ffff ffff ffff 0000060 3600 2700 7994 64ff e3fc ffff 000006c ~ # cat /sys/devices/platform/ff1d0000.spi/spi_master/spi0/spi0.0/spi-nor/jedec_id 0b4016 ~ # cat /sys/devices/platform/ff1d0000.spi/spi_master/spi0/spi0.0/spi-nor/manufacturer xtx ~ # cat /sys/devices/platform/ff1d0000.spi/spi_master/spi0/spi0.0/spi-nor/partname XT25F32B Alex. > > Cheers, > ta > ______________________________________________________ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ >
diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index 653923896205..3f7a52d7fa0b 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -17,6 +17,7 @@ spi-nor-objs += sst.o spi-nor-objs += winbond.o spi-nor-objs += xilinx.o spi-nor-objs += xmc.o +spi-nor-objs += xtx.o obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_MTD_SPI_NOR) += controllers/ diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 0522304f52fa..9a89ec473e4b 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2215,6 +2215,7 @@ static const struct spi_nor_manufacturer *manufacturers[] = { &spi_nor_winbond, &spi_nor_xilinx, &spi_nor_xmc, + &spi_nor_xtx, }; static const struct flash_info * diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 4a3f7f150b5d..ee0e45eaffcd 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -425,6 +425,7 @@ extern const struct spi_nor_manufacturer spi_nor_sst; extern const struct spi_nor_manufacturer spi_nor_winbond; extern const struct spi_nor_manufacturer spi_nor_xilinx; extern const struct spi_nor_manufacturer spi_nor_xmc; +extern const struct spi_nor_manufacturer spi_nor_xtx; void spi_nor_spimem_setup_op(const struct spi_nor *nor, struct spi_mem_op *op, diff --git a/drivers/mtd/spi-nor/xtx.c b/drivers/mtd/spi-nor/xtx.c new file mode 100644 index 000000000000..4eec737e94c7 --- /dev/null +++ b/drivers/mtd/spi-nor/xtx.c @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021, Chris Morgan <macromorgan@hotmail.com> + * Based on XMC SPI NOR module + * Copyright (C) 2005, Intec Automation Inc. + * Copyright (C) 2014, Freescale Semiconductor, Inc. + */ + +#include <linux/mtd/spi-nor.h> + +#include "core.h" + +static const struct flash_info xtx_parts[] = { + /* XTX (XTX Technology Limited) */ + { "XT25F128B", INFO(0x0b4018, 0, 64 * 1024, 256, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, +}; + +const struct spi_nor_manufacturer spi_nor_xtx = { + .name = "xtx", + .parts = xtx_parts, + .nparts = ARRAY_SIZE(xtx_parts), +};
Add support for a new vendor (XTX) along with a new chip from the vendor (XT25F128B). This chip is used in the Odroid Go Advance, and has been tested extensively using the spi-gpio driver, as it is connected to a serial flash controller that is not currently supported (but the pins can be repurposed to GPIO). Read, write, and erase all work as expected. Datasheet can be found here: https://datasheet.lcsc.com/szlcsc/2005251034_XTX-XT25F128BSSIGT_C558844.pdf Signed-off-by: Chris Morgan <macromorgan@hotmail.com> --- drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/core.c | 1 + drivers/mtd/spi-nor/core.h | 1 + drivers/mtd/spi-nor/xtx.c | 24 ++++++++++++++++++++++++ 4 files changed, 27 insertions(+) create mode 100644 drivers/mtd/spi-nor/xtx.c